易翔 Yi Xiang
钱崇斌 2021-04-20 24803

基本信息

职称:教授、博导、硕导

头衔:国家高层次青年人才计划入选者,广东省杰青,番禺区人大代表

Title: Professor, Doctoral & Graduate Supervisor, School of Microelectronics           

Honor: National High-level Young Talents Program,Distinguished Youth of Guangdong Province,deputy of Panyu District People's Congress

联系方式:yixiang@scut.edu.cn

招生专业

个人简介 

易翔,现任华南理工大学微电子学院副院长。博士毕业于新加坡南洋理工大学,先后于新加坡南洋理工大学和美国麻省理工学院开展博士后研究工作。主要研究方向为射频、毫米波和太赫兹频率综合器、通信和雷达收发机集成电路(芯片)设计,特别是毫米波频率综合器和毫米波雷达方向。主持包括国基重点和JZ团队在内的逾3000万人民币的项目。发表包括JSSC和ISSCC在内的论文120余篇(含20余篇集成电路设计顶会ISSCC/顶刊JSSC),出版英文学术专著2部,授权专利16项。为电气和电子工程师协会(IEEE) 高级会员,担任IEEETCAS-II副主编,IEEE JSSC、TMTT、TCAS-I等多个国际期刊审稿人及ISCAS评审委员会委员。获IEEE ISSCC丝绸之路奖、ISSCC STGA奖、中国电子学会技术发明奖二等奖、广东省研究生教学成果奖一等奖、广东省本科教学成果奖二等奖、国家高层次青年人才计划入选者和广东省杰青。任广州市番禺区第十八届人大代表。

招生/招聘信息:欢迎有相关基础和经验,对射频、毫米波和太赫兹频率综合器、通信和雷达收发机集成电路设计感兴趣的本科生、硕士生、博士生和博士后申请加入本课题组。简历请发邮箱:yixiang@scut.edu.cn。

Dr. Xiang Yi, currently the vice-dean and professor of the School of Microelectronics, South China University of Technology. He got his Ph.D. degree from Nanyang Technological University. He worked as a postdoc at Nanyang Technological University and Massachusetts Institute of Technology. His main research fields are RF, millimeter-wave and terahertz frequency synthesizer, communication and radar transceivers IC (chip) design, especially the mm-Wave frequency synthesizer and radar. He PI/Co-PI more than 30 million RMB projects including NSF (Key/General Program) and ZJ Team projects. He has published more than 120 papers including JSSC and ISSCC (with more than 20 IC design top-tier conference ISSCC and journal JSSC papers), published two English academic books, and granted 16 patents. Dr. Yi is a Senior Member of the Institute of Electrical and Electronics Engineers (IEEE), the reviewer of IEEE JSSC, TMTT, TCAS-I and other international journals, and ISCAS Review Committee Member. He won IEEE ISSCC Silkroad award, ISSCC STGA award, Chinese Institute of Electronics2025 Second Prize of Technical Invention Award, 2025 First Prize of Guangdong Province Postgraduate Teaching Achievement Award, 2025 Second Prize of Guangdong Province Undergraduate Teaching Achievement Award, National High-level Young Talents Program and Guangdong Natural Science Funds for Distinguished Young Scholars, and deputy to the 18th National People's Congress of Panyu District, Guangzhou.

Join us: Any undergraduate, master, doctor, and post-doc, who has relevant knowledge, experience, and interest in RF, millimeter-wave and terahertz frequency synthesizer, communication and radar transceivers IC design, are welcome to apply to join our group. Please send me your CV to yixiang@scut.edu.cn.

教育经历

2017.07 - 2020.09  美国麻省理工学院  博士后

2014.07 - 2017.07  新加坡南洋理工大学  博士后

2009.08 - 2014.07  新加坡南洋理工大学  博士

2006.09 - 2009.06  华南理工大学  硕士

2002.09 - 2006.06  华中科技大学  学士

工作经历

2021.01至今  华南理工大学  教授

研究方向

射频/毫米波/太赫兹的频率综合器、通信和雷达收发机集成电路设计,以及人工智能辅助的射频集成电路设计。

授课课程

Principles and Designs of Analog Integrated Circuits

模拟集成电路原理与设计课程设计

先进通信集成电路

学术任职

IEEE高级会员

IEEE TCAS-II副主编

Microelectronics和Chips编委

IEEE JSSC、TMTT、TCAS-I等多个国际期刊审稿人

ISCAS评审委员会委员

IEEE MTT-S AdCom教育委员会委员

主要的科研项目

(1)广东省引进创新创业团队项目“毫米波通感一体化前端集成系统关键技术研究”,2024年9月至2029年8月,1000万,在研,主持。

(2)广州市科技计划项目“cygj计划”创新创业团队引进项目,2024年12月至2029年12月,500万,在研,主持。

(3)广州市科技菁英“领航”项目“面向6G通信的射频毫米波芯片设计”,2025年1月至2027年12月,30万,在研,主持。

(4)国家自然科学基金重点项目,CMOS太赫兹高分辨率雷达全集成芯片关键技术研究,2024年1月至2028年12月,221万,在研,主持。

(5)国家自然科学基金面上项目,面向高精度无线感知系统的毫米波雷达收发机集成电路研究,2023年1月至2026年12月,56万,在研,主持。

(6)国家高层次青年人才计划项目,高能效射频毫米波太赫兹集成电路,2022年1月至2024年12月,300万,在研,主持。

(7)广东省基础与应用基础研究基金自然科学基金杰出青年项目,2022B1515020039,毫米波可复用全双工收发机芯片关键技术,2022年1月至2025年12月,100万,在研,主持。

(8)中央高校基本科研业务费优秀青年团队项目,2023ZYGXZR106,面向6G 应用的通感一体化射频前端系统,2023年1月至2024年12月,400万,在研,主持。

(9)美国林肯实验室,横向项目,FA8702-15-D-0001,Full-Duplex Communication and Sensing,2019年9月至2020年8月,约85万,已结题,参与(主要完成人)。

(10)台积电,横向项目,TSMC Gift Fund,THz Broadband Radar, 2017年8月至2019年9月,约71万,已结题,参与(主要完成人)。

(11)美国德州仪器,横向项目,Texas InstrumentFellowship,THz MolecularClock, 2017年7月至2019年7月,约106万,已结题,参与(核心成员)。

(12)新加坡台达电子,横向项目,RCA-16/428,Wireless Heterogeneous Network TransceiverChipset for Content-Driven Transmission of Learning Media, 2016年7月至2019年7月,约460万,已结题,共同主持。

(13)新加坡格罗方德半导体,横向项目,RCA-16/029,Circuit Design for GaN BasedDC-DC Converter Power, 2016年6月至2018年12月,约150万,已结题,参与(主要完成人)。

(14)中国华为,横向项目,10GiFi Research& Development of Ultra-wideband RF Transceiver, YB2014060004,2014年6月至2017年6月,约500万,已结题,共同主持。

(15)新加坡教育部,AcademicResearch Fund Tier 1项目,MOE RG86/16,Monolithic Terahertz Passive Components InAdvanced CMOS Technology: From Fundamental Understandings, 2016年1月至2017年1月,约77万,已结题,参与(主要完成人)。

(16)新加坡教育部,AcademicResearch Fund Tier 2项目,MOE2012-T2-2-098,High Thermal Resolution Ultra-Low PowerIntegrated Imager: Fundamental Issues in CMOS, 2013年7月至2016年6月,约420万,已结题,参与(主要完成人)。

代表性科研成果

[1] J. Dong, P. Qin, H. Zhu, X. Yi, N. Yang, K. W. Leung, Q. Xue, An Ultra-Compact K-band Wideband Linearized Power Amplifier Supporting 4096-QAM for mm-Wave Communication Applications,  IEEE J. Solid-State Circuits, early access, 2026.

[2] K. Zhong, T. Wang, X. Yi, P. Qin and H. Zhu, A Compact 120.1–151.4-GHz CMOS LO Source for D-Band Radar Based on a Wideband Continuous-Tuning VCO With Intrinsic High Oscillation Frequency, IEEE Trans. Microw. Theory Tech., early access, 2026.

[3] J. Tu, S. Deng, Y. Li, P. Qin, K. Zhong, J. Liang, H. He, H. Zhu, Z. Li, X. Quan and X. Yi, A Sub-THz Dual-Tank VCO Using Active Negative-Conductance Boosted Architecture in 28-nm CMOS,IEEE Trans. on Circuits and Systems-I: Regular Papers, early access, 2026.

[4] A. Hong, X. Yi, Y. Wang, J. Hu, Z. He, G. He, Y. Yang, J. Lai, H. He, L. Su, Z. Deng, J. Xie, S. Yang, H. Zhou, L. Zheng, S. He, P. Qin, H. Zhu, A terahertz FMCW radar with 169-GHz synthetic bandwidth and reconfigurable polarization in 40-nm CMOS, in RFIC Symp. Dig. Papers, Jun. 2025, pp. 359-362.

[5] J. Guo, P. Qin, S. Deng, H. Zhu, X. Yi, Y. Dong, L. Wu, W. Feng, W. Che, Q. Xue, A differential series-resonance CMOS VCO leveraging pole-convergence technique, with a general result on tank phase noise, IEEE J. Solid-State Circuits, vol. 61, no. 5, pp.1988–2003, Dec. 2025. 

[6] J. Guo, P. Qin, H. Zhu, X. Yi, W. Feng and W. Che, A Differential Series-Resonance CMOS VCO with Pole-Convergence Technique Achieving 202.1 dBc/Hz FoMTA at 10MHz Offset, in IEEE ISSCC Dig. Tech. Papers, 2025, pp. 332-334.

[7] J. Wang, M. I. Ibrahim, I. B. Harris, N. M. Monroe, M. I. W. Khan, X. Yi, D. R. Englund, R. Han, THz Cryo-CMOS backscatter transceiver: a contactless 4 Kelvin-300 Kelvin data interface, in IEEE ISSCC Dig. Tech. Papers, Feb. 2023, pp. 504–505.

[8] X. Chen, X. Yi, M. I. Wasiq Khan, X. Li, W. Chen, J. Zhu, Y. Yang, K. E. Kolodziej, N. M. Monroe and R. Han, A 140-GHz FMCW TX/RX-antenna-sharing transceiver with low-inherent-loss duplexing and adaptive self-interference cancellation, IEEE J. Solid-State Circuits, vol. 57, no. 12, pp.3631–3645, Dec. 2022.

[9] C. Wan, T. Xu, X. Yi, and Q. Xue, A current-reused VCO with inductive-transformer feedback technique, IEEE Trans. Microw. Theory Tech., vol. 70, no. 5, pp.2680–2689, May 2022.

[10] X. Li, W. Chen, H. Wu, S. Li, X. Yi, R. Han and Z. Feng, A 110-to-130 GHz SiGe BiCMOS Doherty power amplifier with a slotline-based power combiner, IEEE J. Solid-State Circuits, vol. 57, no. 12, pp.3567–3581, Dec. 2022.

[11] W. A. Ahmad, X. Yi, “How will radar be integrated into daily life?” IEEE Microwave Magazine, vol. 23, no. 5, pp. 30–43, May 2022.

[12] M. I. W. Khan, J. Woo, X. Yi, M. Ibrahim, R. Yazicigil, A. Chandrakasan and R. Han, “A 0.31-THz orbital-angular momentum (OAM) wave transceiver in CMOS with bit-to-OAM mode mapping,” IEEE J. Solid-State Circuits, vol. 57, no. 5, pp.1344–1357, May 2022.

[13] X. Li, W. Chen, S. Li, H. Wu, X. Yi, R. Han and Z. Feng, “A 110-to-130GHz SiGe BiCMOS Doherty Power Amplifier with Slotline-Based Power Combining Technique Achieving >22dBm Saturated Output Power and >10% Power Back-Off Efficiency,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2022, pp. 316–317.

[14] X. Chen, M. I. Wasiq Khan, X. Yi, X. Li, W. Chen, J. Zhu, Y. Yang, K. E. Kolodziej, N. M. Monroe and R. Han, A 140GHz transceiver with integrated antenna, inherent-low-loss duplexing and adaptive self-interference cancellation for FMCW monostatic radar, in IEEE ISSCC Dig. Tech. Papers, Feb. 2022, pp. 80–81.

[15] X. Li, W. Chen, S. Li, Y. Wang, F. Huang, X. Yi, R. Han and Z. Feng, A high-efficiency 142-182 GHz SiGe BiCMOS power amplifier with broadband slotline-based power combining technique, IEEE J. Solid-State Circuits, vol. 57, no. 2, pp.371–384, Feb. 2022.

[16] X. Yi, J. Wang, C. Wang, K. E. Kolodziej and R. Han, “Realization of In-Band Full-Duplex Operation at 300 K and 4.2 K Using Bilateral Single-Sideband Frequency Conversion,” IEEE J. Solid-State Circuits, vol. 56, no. 5, pp.1387–1397, May 2021.

[17] X. Yi, C. Wang, X. Chen, J. Wang, J. Grajal, and R. Han, A 220-to-320-GHz FMCW Radar in 65-nm CMOS Using A Frequency-Comb Architecture, IEEE J. Solid-State Circuits, vol. 65, no. 2, pp.327–339, Feb. 2021.

[18] K. Yang, X. Yi, C. C. Boon, Z. Liang, G. Feng, C. Li, B. Liu, A Parallel Sliding-IF Receiver Front-End with Sub-2 dB Noise Figure for 5-6 GHz WLAN Carrier Aggregation, IEEE J. Solid-State Circuits, vol. 56, no. 2, pp.392–403, Feb. 2021.

[19] C. Wang, X. Yi, M. Kim, Q. Yang and R. Han, A Terahertz Molecular Clock on CMOS Using High-Harmonic-Order Interrogation of Rotational Transition for Medium/Long-Term Stability Enhancement, IEEE J. Solid-State Circuits, vol. 56, no. 2, pp.566–580, Feb. 2021.

[20] X. Yi, J. Wang, C. Wang, K. E. Kolodziej and R. Han, “A 3.4~4.6-GHz In-Band Full-Duplex Front-End in CMOS Using A Bi-Directional Frequency Converter,” in RFIC Symp. Dig. Papers, Jun. 2020, pp. 47–50.

[21] X. Yi, C. Wang, M. Lu, J. Wang, J. Grajal and R. Han, A Terahertz FMCW Comb Radar in 65nm CMOS with 100GHz Bandwidth, in IEEE ISSCC Dig. Tech. Papers, Feb. 2020, pp. 90–91.

[22] C. Wang, X. Yi, M. Kim and R. Han, Sub-THz CMOS Molecular Clock with 43ppt Long-Term Stability Using High-Order Rotational Transition Probing and Slot Array Couplers, in IEEE ISSCC Dig. Tech. Papers, Feb. 2020, pp. 448–449.

[23] X. Yi, Z. Liang, C.C. Boon, G. Feng, F. Meng, and K. Yang, “An Inverted Ring Oscillator Noise-Shaping Time-to-Digital Converter with In-band Noise Reduction and Coherent Noise Cancellation, IEEE Trans. on Circuits and Systems-I: Regular Papers, vol. 67, no. 2, pp. 686–698, Feb. 2020.

[24] B. Liu, *X. Yi, K. Yang, Z. Liang, G. Feng, P. Choi, C. C. Boon, and C. Li, “A Carrier Aggregation Transmitter Front-End for 5-GHz WLAN 802.11ax Application in 40nm CMOS,” IEEE Trans. Microw. Theory Tech., vol. 68, no. 1, pp. 264–276, Jan. 2020.

[25] C. Li, *X. Yi, C. C. Boon, and K. Yang, “A 34 dB Dynamic Range 0.7 mW Compact Switched-Capacitor Power Detector in 65 nm CMOS,” IEEE Trans. on Power Electronics, vol. 34, no. 10, pp. 9365–9368, Oct. 2019.

[26] X. Yi, Z. Liang, G. Feng, F. Meng, C. Wang, C. Li, K. Yang, B. Liu, and C. C. Boon, “A 93.4-to-104.8GHz 57mW fractional-N cascaded PLL with true in-phase injection-coupled QVCO in 65nm CMOS Technology,” IEEE Trans. Microw. Theory Tech., vol. 67, no. 6, pp.2370–2381, Jun. 2019.

[27] C. Wang, X. Yi, J. Mawdsley, M. Kim, Z. Wang, R. Han, “An on-chip fully-electronic molecular clock based on sub-terahertz rotational spectroscopy,” Nature Electronics, Vol. 1, No. 7, Jul. 2018.

[28] X. Yi, K. Yang, Z. Liang, B. Liu, K. Devrishi, C. C. Boon, C. Li, G. Feng, D. Regev, S. Shilo, F. Meng, H. Liu, J. Sun, G. Hu, and Y. Miao, “A 65nm CMOS carrier-aggregation transceiver for IEEE 802.11 WLAN applications,” in RFIC Symp. Dig. Papers, May. 2016, pp.67–70.

[29] X. Yi, Z. Liang, G. Feng, C. C. Boon, and F. Meng, “A 93.4-to-104.8 GHz 57 mW fractional-N cascaded sub-sampling PLL with true in-phase injection-coupled QVCO in 65 nm CMOS,” in RFIC Symp. Dig. Papers, May 2016, pp.122–125.

[30] X. Yi, C. C. Boon, H. Liu, J. Lin, and W. M. Lim, “A 57.9-to-68.3 GHz 24.6 mW frequency synthesizer with in-phase injection-coupled QVCO in 65 nm CMOS Technology,” IEEE J. Solid-State Circuits, vol. 49, no. 2, pp.347–359, Feb. 2014.

[31] X. Yi, C. C. Boon, J. Sun, N. Huang, and W. M. Lim, “A low phase noise 24/77 GHz dual-band sub-sampling PLL for automotive radar applications in 65 nm CMOS technology,” in Proc. ASSCC, Nov. 2013, pp. 417–420.

[32] X. Yi, C. C. Boon, H. Liu, J. Lin, J. C. Ong, and W. M. Lim, “A 57.9-to-68.3GHz 24.6mW frequency synthesizer with in-phase injection-coupled QVCO in 65nm CMOS,” in IEEE ISSCC Dig. Tech. Papers, Feb. 2013, pp. 354–355.

[33] X. Yi, C. C. Boon, J. Lin, and W. M. Lim, “A 100 GHz transformer-based varactor-less VCO with 11.2% tuning range in 65nm CMOS technology,” in Proc. ESSCIRC, Sep. 2012, pp. 293–296.