招生专业

个人简介

    杨文，2021年于美国中佛罗里达大学电子工程专业获得哲学博士学位，随后加入美国Analog Devices, Inc.（ADI）担任研究员。主要研究方向为宽禁带功率半导体器件可靠性及失效分析、宽禁带功率半导体器件集成技术等。曾担任IEEE EDS Orlando Section主席，在微电子器件可靠性领域著名期刊IEEE Transactions on Electron Devices （TED）, Applied Physics Letters （APL）和国际会议IEEE International Reliability Physics Symposium （IRPS）上发表论文近20篇，受邀担任IEEE TED、 IEEE JESTPE、IEEE TDMR及IEEE IRPS等期刊及会议审稿人。

    Dr. Wen Yang received his Ph.D. degree in Electrical Engineering from the University of Central Florida in 2021, and then joined Analog Devices, Inc (ADI) as the Member of Technical Staff. His research interests include the reliability and failure analysis of wide-bandgap semiconductor power devices and integrated wide-bandgap semiconductor devices. He was the chair of the IEEE EDS Orlando Section and has published nearly 20 papers in top-tier journals and international conferences on the reliability of semiconductor devices, which including IEEE Transactions on Electron Devices (TED), Applied Physics Letters (APL), and IEEE International Reliability Physics Symposium （IRPS）. He also served as an invited reviewer for many international journals such as IEEE TED, IEEE JESTPE, APL, IEEE IRPS, etc.

教育经历

2017.08 – 2021.08, 中佛罗里达大学, 电子工程，博士

研究方向

宽禁带半导体功率及射频器件可靠性及失效分析，新型宽禁带半导体器件及集成技术

学术任职

IEEE Member, IEEE Electron Devices Society Member

曾任IEEE EDS Orlando Section主席

担任IEEE TED、IEEE JESTPE、IEEE TDMR等多个国际期刊及会议审稿人

科研项目

1. “Reliability Study of GaN HEMTs using the Experimental Approach,” NSF-MIST Center, 1/1/2018-12/31/2018, grant #16229951, (Funding Amount: $50,000), Lead Researcher

2. “Development and Optimization of GaN-based Integrated Power Converter Platform,” NSF-MIST Center, 1/1/2019-12/31/2019, grant #16229951, (Funding Amount: $50,000), Lead Researcher

3. “Failure Analysis and SOA Improvement for GaN Power Devices,” NSF-MIST Center, 1/1/2019-12/31/2019, grant #16229951, (Funding Amount: $50,000), Lead Researcher

4. “Industry/University Cooperative Research Center: Multi-functional Integrated System Technology (MIST),” NSF USA, 9/1/2014-8/31/2020, award # 1439680, (Funding Amount: $325,000), Main Researcher

5. “Industry/University Cooperative Research Center: Multi-functional Integrated System Technology (MIST) Phase 2,” NSF USA, 4/1/2020-3/31/2025, award# 1939050, (Funding Amount: $627,500), Main Researcher

代表性科研成果

[1] Wen Yang, and Jiann-Shiun Yuan. Substrate bias enhanced trap effects on time-dependent dielectric breakdown of GaN MIS-HEMTs. IEEE Transactions on Electron Devices, vol. 68, no. 5, pp. 2233-2239, 2021.

[2] Wen Yang, and Jiann-Shiun Yuan. Experimental investigation of buffer traps physical mechanisms on the gate charge of GaN-on-Si devices under various substrate biases. Applied Physics Letters, vol. 116, no. 8, pp. 083501, 2020.

[3] Wen Yang, Jiann-Shiun Yuan, Balakrishnan Krishnan, and Patrick Shea. Characterization of Deep and Shallow traps in GaN HEMT using multi-frequency C-V measurement and pulse-mode voltage stress. IEEE Transactions on Device and Materials Reliability, vol. 19, no. 2, pp. 350-357, 2019.

[4] Wen Yang, Nicholas Stoll, and Jiann-Shiun Yuan. ESD Stress Effect on Failure Mechanisms in GaN-on-Si Power Device. IEEE Transactions on Device and Materials Reliability, vol. 21, no. 4, pp. 479-485, 2021.

[5] Wen Yang, and Jiann-Shiun Yuan. Negative-Bias Temperature Instability of p-GaN Gate GaN-on-Si Power Devices. IEEE Transactions on Device and Materials Reliability, vol. 22, no. 2, pp. 217-222, 2022.

[6] Wen Yang, Jiann-Shiun Yuan, Balakrishnan Krishnan, and Patrick Shea. Low-side gan power device dynamic r on characteristics under different substrate biases. in 2019 IEEE International Reliability Physics Symposium (IRPS), pp. 1-7, 2019. (Oral)

[7] Wen Yang, Nicholas Stoll, and Jiann-Shiun Yuan. ESD robustness of GaN-on-Si power devices under substrate biases by means of TLP/VFTLP tests. in 2020 IEEE International Reliability Physics Symposium (IRPS), pp. 1-5, 2020.

[8] Wen Yang, Jiann-Shiun Yuan, Balakrishnan Krishnan, An-Jye Tzou, and Wen-Kuan Yeh. Substrate Bias Effect on Dynamic Characteristics of a Monolithically Integrated Gan Half-bridge. n 2020 IEEE International Reliability Physics Symposium (IRPS), pp. 1-5, 2020.

[9] Wen Yang, Jiann-Shiun Yuan, Balakrishnan Krishnan, A. J. Tzou, and Wen-Kuan Yeh. C-V Measurement under Different Frequencies and Pulse-mode Voltage Stress to Reveal Shallow and Deep trap Effects of GaN HEMTs. in 2018 IEEE 6th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), pp. 103-107, 2018. (Oral)

[10] Wen Yang, Nicholas Stoll, Jiann-Shiun Yuan, and Balakrishnan Krishnan. ESD Behavior of GaN-on-Si Power Devices under TLP/VFTLP Measurements. in 2019 IEEE 7th Workshop on Wide Bandgap Power Devices and Applications (WiPDA), pp. 171-174, 2019. (Oral)

[11] Wen Yang, and Jiann-Shiun Yuan. Experimental Verification of Substrate Bias Effect on the Gate Charge for GaN HEMTs. in 2019 Compound Semiconductor Week (CSW), pp. 1-2. 2019. (Oral)