题目：SOI Technology: State of the art and trends

时间：2024年3月12日（周二）下午16:30

地点：国际校区C1-b114

主讲人：Sorin Cristoloveanu 

主讲人简介：

Sorin Cristoloveanu received the PhD (1976) in Electronics and the French Doctorat ès-Sciences in Physics (1981) from Grenoble Polytechnic Institute, France. He is currently Chief Scientist of GIICS (Guangdong Greater Bay Area Institute of Integrated Circuit and System) and Emeritus Director of Research CNRS. He also worked at JPL (Pasadena), Motorola (Phoenix), and the Universities of Maryland, Florida, Vanderbilt, Western Australia, and Kyungpook (World Class University project, Korea). He served as the director of the LPCS Laboratory and the Center for Advanced Projects in Microelectronics, initial seed of Minatec center. He authored more than 1,200 technical journal papers and communications at international conferences (including 200 invited contributions). He is the author or the editor of 36 books, and he has organized 35 international conferences. His expertise is in the area of the electrical characterization and modeling of semiconductor materials and devices, with special interest for silicon-on-insulator structures. He has supervised more than 110 PhD completions. With his students, he has received 17 Best Paper Awards, an Academy of Science Award (1995), and the Electronics Division Award of the Electrochemical Society (2002). He is a Life Fellow of IEEE, a Fellow of the Electrochemical Society, Doctor Honoris Causa of the University of Granada, and Editor of Solid-State Electronics. He is the recipient of the IEEE Andy Grove award 2017, the most prestigious distinction in the field of electronic components, for contributions to ‘silicon-on-insulator technology and thin body devices’. This is actually the topic of his recent book https://www.sciencedirect.com/book/9780128196434/fully-depleted-silicon-on-insulator#book-info

讲座内容：  

SOI materials and transistors have been developed in parallel with the CMOS technology on bulk silicon. 60 years of SOI MOSFETs are briefly evoked, highlighting the milestones. The technology evolution has eventually achieved devices with sub-10 nm thickness where special mechanisms take place. The back-gate biasing, super-coupling, floating-body, volume inversion, and electrostatic doping are unique SOI concepts, inspiring the design of revolutionary devices. Selected examples, including the core-shell junctionless transistor, Hocus-Pocus Esaki diode and band-modulation transistors, are incentive for compact modeling and circuit design.