报告人：余成斌教授，Prof. Seng-Pan U (Ben)，IEEE Fellow，中国科技部委员会委员，澳门大学AMSV国家重点实验室执行主任，澳门Synopsys公司总经理
报告题目：Hybrid Design of Analog-to-Digital Converters
Traditionally, ADC architectures have been sorted into distinct categories such as FLASH, SAR, pipeline, and sigma-delta. Recently, improvements in ADC power, speed, and resolution have been enabled by a “hybrid” approach that combines techniques from many ADC architectures. Further, this trend of hybrid design is extended beyond the choice of quantizer to include a mix of circuit topologies in key ADC building blocks. The resulting degrees of freedom allow designers to fully optimize their converters, leading to performance levels beyond what can be achieved with conventional architectures. This tutorial will start with a general overview of key ADC architectures (e.g. Flash, SAR, pipeline and sigma-delta), highlighting basic operation and design trade-offs. Second, the architectural hybrid designs in consideration of various quantizer options will be discussed. Last, illustrative examples of hybrid circuit topologies and techniques will be discussed, with emphasis on design choices that enabled performance benefits for the specific application of interest.
Seng-Pan U (Ben) (S’94 - M’00 - SM’05 - F’16) received the B.Sc. and M.Sc degree in 1991 and 1997, respectively, and the dual Ph.D. (Hons.) degrees from the University of Macau (UM) and the Instituto Superior Técnico (IST), Portugal in 2002 and 2004 respectively.
Prof. U has been with Faculty of Science & Technology (FST), UM since 1994, where he is currently Visiting Professor of FST and Deputy Director of State-Key Laboratory of Analog & Mixed-Signal (AMS) VLSI. From 1999 to 2001, he was on leave to the Center of Microsystems in IST, as a Visiting Research Fellow.
In 2001, Prof. U co-founded the Chipidea Microelectronics (Macau), Ltd. as the Engineering Director, and later the corporate VP-IP Operations Asia Pacific devoting to advanced AMS Semiconductor IP product development. The company was acquired in 2009 by the world leading EDA & IP provider Synopsys Inc. (NASDAQ: SNPS), currently as Synopsys Macau Ltd. He is now the corporate R&D director and site general manager.
Prof. U has co-authored more than 200 publications, four books (Springer and China Science Press) in the area of VHF SC filters, analog baseband for Multi-standard wireless transceivers and very high-speed TI ADCs. He also co-holds 12 US patents.
Prof. U received 30+ research & academic/teaching awards and is co-recipient of the ISSCC 2017 Takuo Sugano Award and ESSCIRC 2014 Best Paper Award. He is also the Advisor for 30+ various student research award recipients, e.g. SSCS Pre-Doctoral Achievement Award, ISSCC Silk-Road Award, A-SSCC Student Design Contest, IEEE DAC/ISSCC Student Design Contest, ISCAS, MWSCAS, PRIME and etc. As the Macau founding Chairman, he received the 2012 IEEE SSCS Outstanding Chapter Award. Both at the 1st time from Macau, he received the Science & Technology (S&T) Innovation Award of Ho Leung Ho Lee Foundation in 2010, and also The National State S&T Progress Award in 2011. He also received both the 2012, 2014 and 2016 Macau S&T Invention Award and Progress Award. In recognition of his contribution in academic research & industrial development, he was awarded by Macau SAR government the Honorary Title of Value in 2010. He was also elected as the “Scientific Chinese of the Year 2012”.
Prof. U is currently IEEE Fellow, honorary founding chairman of SSCS Macau chapter. He is appointed a member of the S&T Commission of China Ministry of Education and S&T Committee of Macau SAR. He was IEEE SSCS Distinguished Lecturer (2014-2015), A-SSCC 2013 and ISSCC 2018 Tutorial Speaker. He has also been on the technical review committee of various IEEE journals and the program committee/chair of IEEJ AVLSIWS, IEEE APCCAS, ICICS, PRIMEAsia and ASP-DAC. He is currently TPC of ISSCC, Sub-Committee Chair (Data Converters) of A-SSCC, the Analog Sub-Committee Chair of VLSI-DAT and Editorial Board member of the Journal AICSP.